1. general description the 74ahc257-q100; 74ahct257-q100 is a high-speed si-gate cmos device and is pin compatible with low-power schottky ttl (l sttl). it is specified in compliance with jedec standard no. 7-a. the 74ahc257-q100; 74ahct257-q100 has f our identical 2-input multiplexers with 3-state outputs. they select 4 bits of data from two sources and a common data select input (s) controls them. the data inputs from source 0 (1i0 to 4i0), are selected when input s is low. the data inputs from source 1 (1i1 to 4i1) are selected when input s is high. data appears at the outputs (1y to 4y) in true (non-inverting) form from the selected inputs. the 74ahc257-q100; 74ahct25 7-q100 is the logic implementation of a 4-pole 2-position switch. the logic levels ap plied to input s determine the position of the switch. the outputs are forced to a high-impedance off-state when oe is high. the logic equations for the outputs are: 1y = oe ?? (1i1 ?? s + 1i0 ?? s ) 2y = oe ?? (2i1 ?? s + 2i0 ?? s ) 3y = oe ?? (3i1 ?? s + 3i0 ?? s ) 4y = oe ?? (4i1 ?? s + 4i0 ?? s ) this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? balanced propagation delays ? all inputs have schmitt-trigger actions ? non-inverting data path ? inputs accept voltages higher than v cc ? input levels: ? for 74ahc257-q100: cmos level ? for 74ahct257-q100: ttl level 74ahc257-q100; 74ahct257-q100 quad 2-input multiplexer; 3-state rev. 1 ? 22 july 2013 product data sheet
74ahc_ahct257_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserve d. product data sheet rev. 1 ? 22 july 2013 2 of 17 nxp semiconductors 74ahc257-q100; 74ahct257-q100 quad 2-input multiplexer; 3-state ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74ahc257-q100 74ahc257d-q100 ? 40 ? c to +125 ? c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74AHC257PW-Q100 ? 40 ? c to +125 ? c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74ahct257-q100 74ahct257d-q100 ? 40 ? c to +125 ? c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74ahct257pw-q100 ? 40 ? c to +125 ? c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 fig 1. functional diagram mgr280 s1 1i 0 2 1y 4 1i 1 3 selector 3-state multiplexer outputs 2i 0 5 2y 7 2i 1 6 3i 0 11 3y 9 3i 1 10 4i 0 14 4y 12 4i 1 13 oe 15
74ahc_ahct257_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserve d. product data sheet rev. 1 ? 22 july 2013 3 of 17 nxp semiconductors 74ahc257-q100; 74ahct257-q100 quad 2-input multiplexer; 3-state fig 2. logic symbol fig 3. iec logic symbol mga835 s oe 1y 2y 3y 4y 2 3 5 6 11 10 14 13 15 1 4 7 9 12 1i 0 1i 1 2i 0 2i 1 3i 0 3i 1 4i 0 4i 1 001aad467 15 1 g1 1 mux 1 4 2 3 7 5 6 9 11 10 12 14 13 en fig 4. logic diagram 001aad468 1y s oe 1i0 1i1 2i0 2i1 3i0 3i1 4i0 4i1 2y 3y 4y
74ahc_ahct257_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserve d. product data sheet rev. 1 ? 22 july 2013 4 of 17 nxp semiconductors 74ahc257-q100; 74ahct257-q100 quad 2-input multiplexer; 3-state 5. pinning information 5.1 pinning 5.2 pin description fig 5. pin configuration so16 and tssop16 $ + & |